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atmel-42380b-wilc1000-mr110pa-smartconnect-datasheet_10/2014 description the atmel ? wilc1000-mr110pa is a low-powe r consumption 8 02.11 b/g/n iot (internet of things) module which is s pecifically optimize d for low power iot applications. the highly integrated module features small form factor (21.5mm x 14.5mm x3.4mm) while fully integrating power amplifie r, lna, switch, power management and pcb antenna. with seamless roamin g capabilities and advanced security, it could be interoperable with various vendors' 802.11b/g/n access points in wireless lan. the module provides spi and sdio to interface to host controller. features key features of the wilc1000-mr110pa: ? eee 802.11 b/g/n rf/ph/mac soc ? ieee 802.11 b/g/n (1x1 ) for up to 72 mbps ? single spatial stream in 2.4ghz rf band ? integrated pa and t/r switch ? integrated pcb antenna ? superior sensitivity and range vi a advanced phy signal processing ? advanced equalization and channel estimation ? advanced carrier and timing synchronization system features of the wilc1000-mr110pa: ? wi-fi direct and soft-ap support ? supports ieee 802.11 we p, wpa, wpa2 security ? on-chip memory management engine to reduce host load ? i/o operating range of 1.8v to 3.6v ? operating temperature range of -30c to +85c ? spi and sdio host interfaces ? power save modes ? 4a deep power down mode typical @3.3v i/o ? 850a doze mode (state is preserved) ? on-chip low power sleep oscillator ? fast host wake-up by chip pin or clock-less transaction ? wi-fi security wep, wpa, wpa2 and wps atmel atwilc1000-mr110pa ieee 802.11 b/g/n iot module preliminary datasheet
2 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 1. ordering information figure 1-1. atwilc1000-mr110pa or dering information details 2. deliverable 2.1 deliverable the following products and softwar e will be part of the product. ? module with packaging ? evaluation kits ? software utility for integr ation and performance test ? product datasheet 2.2 regulatory certificates the product is a pre-tested module ce rtified to fcc part 15, ce and telec. ordering code package description atwilc1000-mr110pa 22 x 15mm certified module with atwilc1000a-mu chip and pcb antenna atwilc1000 - mr 1 1 0 p mr: industrial 0: no ota/ no shield 1: no ota/ with shield 2: ota with shield 7: ota/ no sheild 1: 2.4ghz blank: tray packing revision letter 0: no antenna p: pcb antenna c: chip antenna 0: no fem 1: fem device name
3 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 3. block diagram figure 3-1. atwilc1000-mr110pa block diagram 4. general specifications 4.1 wi-fi rf specification $7:,/&$ %*162& %$/81 0k]&u\vwdo 5;7; 3ulqwhg*+] $qwhqqd 9%$7 ,& 6',2ab63,b&)* *3,2 *3,2 *3,2 ,541 &klsb(q :$.( 5(6(7 *1' 63,6',2 9'',2 8$57 *3,2 6zlwfklqj 5hjxodwru 9%$7 &klsb(q table 4-1. conditions: vbat=3.6v; vddio=3.3v; temp: 25c feature description module part number atwilc1000-mr110pa wlan standard ieee 802.11b/g/n, wi-fi compliant host interface spi, sdio dimension l x w x h: 21.5 x 14.5 x 1.5 (typical) mm frequency range 2.412 ghz ~ 2.4835 ghz (2.4 ghz ism band) number of channels 11 for north america, 13 for europe, and 14 for japan modulation 802.11b: dqpsk, dbpsk, cck 802.11g/n: ofdm /64- qam,16-qam, qpsk, bpsk
4 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 output power 802.11b /11mbps: 19 dbm 1.5 db @ evm -9db 802.11g /54mbp : 14.5 dbm 2 db @ evm -25db 802.11n /65mbps : 13 dbm 2 db @ evm -28db receive sensitivity (11n,20mhz) @10% per mcs=0, per @ -90 1dbm, typical mcs=1, per @ -86 1dbm, typical mcs=2, per @ -84 1dbm, typical mcs=3, per @ -81.5 1dbm, typical mcs=4, per @ -78 1dbm, typical mcs=5, per @ -74 1dbm, typical mcs=6, per @ -72.5 1dbm, typical mcs=7, per @ -71.5 1dbm, typical receive sensitivity (11g) @10% per 6mbps, per @ -91 1dbm, typical 9mbps, per @ -89 1dbm, typical 12mbps, per @ -88.5 1dbm, typical 18mbps, per @ -86.5 1dbm, typical 24mbps, per @ -84 1dbm, typical 36mbps, per @ -78.5 1dbm, typical 48mbps, per @ -77 1dbm, typical 54mbps, per @ -75 1dbm, typical receive sensitivity (11b) @8% per 1mbps, per @ -98 1dbm, typical 2mbps, per @ -95 1dbm, typical 5.5mbps, per @ -93 1dbm, typical 11mbps, per @ -89 1dbm, typical data rate 802.11b: 1, 2, 5.5, 11mbps 802.11g 6, 9, 12, 18, 24, 36, 48, 54mbps data rate 802.11n: 6.5, 13, 19.5, 26, 39, 52, 58.5, 65mbps data rate (20mhz ,short gi,400ns) 802.11n: 7.2, 14.4, 21.7, 28 .9, 43.3, 57.8, 65,72.2mbps maximum input level 802.11b: 0dbm typical 802.11g/n: -5dbm typical table 4-1. conditions: vbat=3.6v; vddio=3.3v; temp: 25c (continued) feature description
5 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 4.2 voltages 4.2.1 absolute maximum ratings 4.2.2 recommended operating ratings note: 1. the voltage of vddio is dependent on system i/o voltage. operating temperature -30c to 85c storage temperature -40c to 85c humidity operating humidity 10% to 95% non-condensing storage humidity 5% to 95% non-condensing table 4-1. conditions: vbat=3.6v; vddio=3.3v; temp: 25c (continued) feature description table 4-2. absolute maximum ratings symbol description min typical max unit vbat input supply voltage -0.3 5.5 v vddio spi voltage -0.3 3.6 v table 4-3. recommended operating ratings symbol test conditions min typical max unit vbat -30 ? c - +85 ? c 3.0 3.6 4.2 v vddio (1) -30 ? c - +85 ? c 1.8 3.3 3.6 v
6 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 5. pin assignments 5.1 top view figure 5-1. top view 6',2b&)* :$.( *1'b ,451 6'b'$7$8$57b7;' 6'b'$7$63,b026, 6'b'$7$63,b661 6'b'$7$63,b0,62 6'b'0'63,b6&. 6'b&/.8$57b5;' 9%$7 1& 1& 1& 1& *3,2b &+,3b(1 9'',2 - - - *1'b - - - - - - - - - - - - - - - - - - - - - - - - - 39b73 *3,2b *3,2b *3,2b *1' *3,2b ,&b6&/ ,&b6'$ 5(6(7b1
7 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 5.2 pin descriptions table 5-1. pin definitions pin # name type description programmable pull-up resistor 1 gpio_6 i/o general purpose i/o. yes 2 i2c_scl i/o i 2 c slave clock. can be conf igured as either master or slave. i 2 c interface is only used for test purposes. this pin should be brought to a test point only. do not add a pull-up resistor. yes 3 i2c_sda i/o i 2 c slave data. can be configured as either master or slave. i 2 c interface is only used for test purposes. this pin should be brought to a test point only. do not add a pull-up resistor. yes 4 reset_n i active-low hard reset. when asserted to a low level, the module will be placed in a reset state. when asserted to a high level, the module will run normally. connect to a host output that defaults low at power up. if the output floats, add a 1m ohm pull-down resistor if necessary to ensure a low level at power up. no 5 nc - no connect 6 nc - no connect 7 nc - no connect 8 nc - no connect 9 gnd_1 - gnd 10 sdio~_spi_cfg i tie to vddio through a 1m ohm resistor to enable the spi interface. connect to ground to enable sdio interface. no 11 wake i host wake control. can be used to wake up the module from doze mode. connect to a host gpio. no 12 gnd_2 - gnd 13 irqn o atwinc1500 device interrupt. no 14 sd_dat3/uart_txd sdio=i/o uart=o sdio data line 3 from atwilc1000-mr110pa when module is configured for sdio. uart transmit output from atwilc1000 when module is configured for spi. yes 15 sd_dat2/spi_rxd sdio=i/o spi=i sdio data line 2 signal from atwilc1000-mr110pa when module is configured for sdio. spi mosi (master out slave in) pin when module is configured for spi. yes
8 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 16 sd_dat1/spi_ssn sdio=i/o spi=i sdio data line 1 from atwilc1000-mr110pa when module is configured for sdio. active low spi slave select from atwilc1000 when module is configured for spi. yes 17 sd_dat0/spi_txd sdio=i/o spi=o sdio data line 0 from atwilc1000-mr110pa when module is configured for sdio. spi miso (master in slave out) pin from atwilc1000 when module is configured for spi. yes 18 sd_cmd/spi_clk sdio=i/o spi=i sdio cmd line from atwilc1000-mr110pa when module is configured for sdio. spi clock from atwilc1000 when module is configured for spi. yes 19 sd_clk/uart_rxd sdio=i uart=i sdio clock line from atwilc1000-mr110pa when module is configured for sdio. uart receive input to atwilc1000 when module is configured for spi. yes 20 vbatt - battery power supply 21 gpio_1 i general purpose i/o. yes 22 chip_en i module enable. high level enables module, low level places module in power down mode. connect to a host output that defaults low at power up. if the output floats, add a 1m ohm pull-down resistor if necessary to ensure a low level at power up. no 23 vddio - i/o power supply. must match host i/o voltage. 24 1p3v_tp - 1.3v vdd core test point 25 gpio_3 - general purpose i/o. yes 26 gpio_4 i/o general purpose i/o. yes 27 gpio_5 i/o general purpose i/o. yes 28 gnd_3 - gnd table 5-1. pin definitions (continued) pin # name type description programmable pull-up resistor
9 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 6. module outline drawings figure 6-1. module drawings - top and bottom views
10 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 7. module schematic figure 7-1. atwilc1000-mr110pa schematic
11 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 8. module bill of materials (bom) table 8-1. atwilc1000-mr110pa bill of material
12 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 9. host interfaces 9.1 spi interface 9.1.1 overview when the module is configured for spi mode by connecting the sdio~_spi_cfg pin to vddio, the atwilc1000-mr110pa has a serial peripheral interface ( spi) that operates as a sp i slave. the spi interface can be used for control and for serial i/o of 802.11 data. the spi pins are mapped as shown in table 9-1 . the spi is a full-duplex slave-synchronous serial interface th at is available immediately following reset when pin 10 (spi_cfg) is tied to vddio. table 9-1. spi interface pin mapping when the spi is not selected, i.e., when ssn is high , the spi interface will not interfere with data transfers between the serial-master and other serial-slave devices. when the serial slave is not selected, its transmitted data output is buffered, resulting in a high impedance drive onto the miso line. the spi interface responds to a protocol that allows an external host to read or write any register in the chip as well as initiate dma transfers. the spi ssn, mosi, miso and sck pins of the atwilc 1000-mr110pa have internal programmable pull-up resistors (see section 9.1). these resi stors should be programmed to be disa bled. otherwise, if any of the spi pins are driven to a low level while the atwilc1000-mr110pa is in the lo w power sleep state, current will flow from the vddio supply through the pull-up resistors, increasing the current consumption of the module. 9.1.2 spi timing the spi timing is provided in figure 9-1 and in table 9-2 on page 13 . pin # spi function 10 cfg: must be tied to vddio 16 ssn: active low slave select 15 mosi: serial data receive 18 sck: serial clock 17 miso: serial data transmit
13 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 figure 9-1. spi timing diagra m (spi mode cpol=0, cpha=0) table 9-2. spi slave timing parameters parameter symbol min max units clock input frequency f sck 48 mhz clock low pulse width t wl 15 ns clock high pulse width t wh 15 ns clock rise time t lh 10 ns clock fall time t hl 10 ns input setup time t isu 5 ns input hold time t ihd 5 ns output delay t odly 0 20 ns slave select setup time t sussn 5 ns slave select hold time t hdssn 5 ns w /+ 6&. 7;' 5;' 661 w :+ w +/ w :/ w 2'/< w ,68 w ,+' i 6&. w 662'/< 661 w 68661 w +'661 63,0dvwhu 63,6odyh
14 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 9.2 uart when the module is configured for spi mode by connecting the sdio~_spi_cfg pin to vddio, the atwilc1000-mr110pa has a universal asynchronous rece iver / transmitter (uart) interface available on pins j14 and j19. it can be used for control or data transfer if the baud rate is suffic ient for a given application. the uart is compatible with the rs-232 standard, where nmc1000 operates as data terminal equipment (dte). it has a two-pin rxd/txd interface. the uart features programmable baud rate generation with fractional clock division, which allows transmission and reception at a wide variety of st andard and non-standard baud rates. t he uart input clock is selectable between 10mhz, 5mhz, 2.5mhz, and 1.25mhz. the clock divider value is programmable as 13 integer bits and 3 fractional bits (with 8.0 being the smallest recomm ended value for normal operation). this results in the maximum supported baud rate of 10mhz / 8.0 = 1.25 mbd. the uart can be configured for seven or eight bit operation, with or without parity, with four different parity types (odd, even, mark, or space), and with one or two stop bits. it also has rx and tx fifos, which ensure reliable high speed reception and low software overhead transmission. fifo size is 4 x 8 for both rx and tx direction. the uart also has status registers showing th e number of received characte rs available in the fifo and various error c onditions, as well the ability to generate interrupts based on these status bits. an example of uart receiving or tran smitting a single packet is shown in figure 9-2 . this example shows 7-bit data (0x45), odd parity, and two stop bits. see the atwilc1000-mr110pa programming guide for information on configuring the uart. figure 9-2. example of uart rx or tx packet 9.3 sdio interface when the module is configured fo r sdio mode by connecting the sdio~_spi_cfg pin to ground, the atwilc1000-mr110pa has a sdio interface. the sdio inte rface can be used for control and for serial i/o of 802.11 data. the sdio pins are mapped as shown in figure 9-3 . the sdio interface is available immediately following reset when pin 10 (spi_cfg) is tied to ground. the atwilc1000-mr110pa sdio is a full speed interface. the interface supports the 1-bit/4-bit sd transfer mode at the clock range of 0-50mhz. the host can use th is interface to read and wr ite from any register within the chip as well as configure the atwilc1000-mr110pa for data dma .
15 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 when the sdio card is inserted into an sdio aware host, the detection of the ca rd will be via the means described in sdio specification. duri ng the normal initialization and interrogation of the card by the host, the card will identify itself as an sdio device. the host software will obtain the card information in a tuple (linked list) format and determine if that card's i/o function(s) are acce ptable to activate. if the ca rd is acceptable, it will be allowed to power up fully and start the i/o function(s) built into it. the sd memory card communication is based on an ad vanced 9-pin interface (clock, command, 4 data and 3 power lines) designed to operate at ma ximum operating frequency of 50mhz. 9.3.1 features ? meets sdio card specification version 2.0. ? host clock rate variable between 0 and 50 mhz ? 1 bit/4-bit sd bus modes supported ? allows card to interrupt host ? responds to direct read/wri te (io52) and extended read /write (io53) transactions. ? supports suspend/resume operation. 9.3.2 sdio timing figure 9-3. sdio timing diagram table 9-3. sdio interface pin mapping pin # sdio function 10 cfg: must be tied to ground 14 dat3: data 3 15 dat2: data 2 16 dat1: data 1 17 dat0: data 0 18 cmd: command 19 clk: clock 6'b&/. ,qsxwv 2xwsxwv i ss w :/ w :+ w +/ w /+ w ,68 w ,+ w 2'/<0$; w 2'/<0,1
16 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 9.4 i 2 c interface atwilc1000-mr110pa provides an i2c bus slave that allows the host proces sor to read or write any register in the chip. atwilc1000-mr110pa supports i2c bus version 2.1 - 2000. the i 2 c interface, used primarily for debug, is a two-wire se rial interface consisting of a serial data line (sda, pin 17) and a serial clock (scl, pin 18). it responds to the seven bit address value 0x60. the atwilc1000- mr110pa i2c interface can operate in standard mode (wit h data rates up to 100 kb/s) and fast mode (with data rates up to 400 kb/s). the i 2 c is a synchronous serial interface. the sda line is a bidirectional signal and changes only while the scl line is low, except for stop, start, and restart cond itions. the output drivers are open-drain to perform wire-and functions on the bus. the maximum number of devices on the bus is limited by only the maximum capacitance specification of 400pf. da ta is transmitted in byte packages. for specific information, please refer to the philips specification entitled ?the i 2 c -bus specification, version 2.1?. 9.4.1 i 2 c timing the i 2 c timing is provided in figure 9-4 and table 8-5. figure 9-4. i 2 c timing diagram table 9-4. sdio timing parameters parameter symbol min. max. unit clock input frequency f pp 0 50 mhz clock low pulse width t wl 10 ns clock high pulse width t wh 10 ns clock rise time t lh 10 ns clock fall time t hl 10 ns input setup time t isu 5 ns input hold time t ih 5 ns output delay t odly 0 14 ns w +/ 6'$ 6&/ w +'67$ w :/ w :+ w 68'$7 w 35 w +''$7 w 35 w 35 w /+ w +/ w /+ w 68672 w %8) w 6867$ i 6&/
17 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 9.5 host interface power- up sequence timing diagram figure 9-5. host interface powe r up sequence timing diagram table 9-5. i 2 c timing parameters parameter symbol min. max. unit remarks scl clock frequency f scl 0 400 khz scl low pulse width t wl 1.3 ? s scl high pulse width t wh 0.6 ? s scl, sda fall time t hl 300 ns scl, sda rise time t lh 300 ns this is dictated by external components start setup time t susta 0.6 ? s start hold time t hdsta 0.6 ? s sda setup time t sudat 100 ns sda hold time t hddat 0 40 ns ns slave and master default master programming option stop setup time t susto 0.6 ? s bus free time between stop and start t buf 1.3 ? s glitch pulse reject t pr 0 50 ns
18 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 10. notes on interfacing to the atwilc1000-mr110pa 10.1 programmable pull up resistors the atwilc1000-mr110pa provides programmable pull-up re sistors on various pins. the purpose of these resistors is to keep any unused input pins from floating which can cause excess current to flow through the input buffer from the vddio supply. any unused module pin on the atwilc1000-mr110pa should leave these pull- up resistors enabled so the pin will not float. the default state at powe r up is for the pull- up resistor to be enabled. however, any pin which is used should have the pu ll-up resistor disabled. the reason for this is that if any pins are driven to a low level while the atwilc100 0-mr110pa is in the low pow er sleep state, current will flow from the vddio supply through the pull-up resistor s, increasing the current consumption of the module. since the value of the pull-up resistor is approximately 10 0k ohms, the current through any pull-up resistor that is being driven low will be vddio/100k. for vddio = 3.3v , the current through each pu ll-up resistor that is driven low would be approximately 3.3v/100k = 33a. pins which are used and have had the programmable pull-up resistor disabled should always be actively driven to either a high or low level and not be allowed to float. see the atwilc1000-mr110pa programming guide for information on enabling/disabling the programmable pull up resistors. 11. recommended footprint (unit: mm) figure 11-1. footprint drawing
19 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 12. recommended reflow profile referred to ipc/jedec standar d. peak temperature: <250 ? c number of times: 2 times maximum figure 12-1. typical reflow profile
20 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 13. application schematic figure 13-1. sdio application schematic
21 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 figure 13-2. spi application schematic
22 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 14. technical support and resources for technical support and other resources visit: http://www.atmel.com/design-support
23 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 15. revision history doc. rev. date comments 42380b 10/2014 product name corrected from atwilc1000-mr110p to atwilc1000-mr110pa. 42380a 10/2014 initial document release.
1 atmel atwilc1000-mr110pa [preliminary datasheet] atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1. ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2. deliverable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2.1 deliverable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2.2 regulatory certificates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 3. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4. general specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4.1 wi-fi rf specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4.2 voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5. pin assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5.1 top view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5.2 pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6. module outline drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 7. module schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 8. module bill of materials (bom) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 9. host interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 9.1 spi interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 9.2 uart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 9.3 sdio interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 9.4 i2c interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 9.5 host interface power-up sequence timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 10. notes on interfacing to the atwilc1000-mr110pa . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 10.1 programmable pull up resistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 11. recommended footprint (unit: mm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 12. recommended reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 13. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 14. technical support and resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 15. revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
x x xx x x atmel corporation 1600 technology drive, san jose, ca 95110 usa t: (+1)(408) 441.0311 f: (+1)(408) 436.4200 |www.atmel.com ? 2014 atmel corporation. / rev.: atmel-42380b-smartconnect-wilc1000-mr110pa_datasheet_10/2014. atmel ? , atmel logo and combinations thereof, enabling unlimited possibilities, and others are registered trademarks or trademarks of atmel corporation in u.s. and other countries. other terms and product names may be trademarks of others. disclaimer: the information in this document is provided in c onnection with atmel products. no license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of atmel products. except as set forth in the atmel terms and condit ions of sales located on the atmel website, atmel assumes no liability wh atsoever and disclaims any express, implied or statutory warranty relating to its p roducts including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or non-infringement. in no event shall atmel be liable for any direct, indirect, consequential, pu nitive, special or incidental damages (including, without limi tation, damages for loss and profits, business interruption, or loss of information ) arising out of the use or inability to use this document, even if atmel has been advised of the possibility of such damages. atmel makes no r epresentations or warranties with respect to the accuracy or c ompleteness of the contents of this document and reserves the right to make changes to specificatio ns and products descriptions at any time without notice. atmel d oes not make any commitment to update the information contained herein. unless specifically provided otherwise, atme l products are not suitable for, and shall not be used in, automo tive applications. atmel products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. safety-critical, military, and automotive applications disclaim er: atmel products are not designed for and will not be used in connection with any applications where the failure of such products would reasonably be expected to re sult in significant personal inju ry or death (?safety-critical a pplications?) without an atmel officer's specific written consent. safety-critical applications incl ude, without limitation, life support devices and systems, equipment or systems for t he operation of nuclear facilities and weapons systems. atmel products are not designed nor intended for use in military or aerospace applications or environments unless specifically designated by atmel as military- grade. atmel products are not designed nor intended for use in automot ive applications unless spec ifically designated by atmel as automotive-grade.

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